Parallel test strategy in next-generation embedded system design

Embedded design is facing an interesting dilemma: the system is more complex, but time is getting tighter and the quality is more demanding. Today's embedded devices have more features than in the past. Systems consisting of FPGAs, microprocessors, cameras and motion sensors can control devices ranging from autonomous LEGO robots to CERN's large hadron colliders. These devices are often monitored for security and have a large amount of software. Traditional black box testing is not very effective, which creates a terrible verification and testing bottleneck in embedded design.

Traditional test methods are clearly not sufficient, and engineers and embedded developers do not have time to make manual measurements or risk the discovery of critical defects in the final manufacturing process. At the same time, the Asian market has also brought unique challenges, such as the need to integrate development cycles around the world, as well as intense cost pressures. Therefore, embedded designers need innovative tools, techniques, and methodologies. Without new tools, embedded designers must become test experts.

The good news is that many technologies can assist in this process. From new data buses, multi-core processors to synchronous execution software, there is a new hope for embedded designers. Developers can now achieve faster testing through parallel processing and parallel measurements. The move to multi-core processors eliminates the time constraints caused by traditional sequential single-core test platforms. This allows engineers and scientists with the right tools to process and analyze data in parallel. In essence, parallel software languages ​​like NI LabVIEW enable applications that perform on multi-core systems to dramatically increase performance without having to change program code.

If engineers can use parallel processing, they will also require more efficient measurements. Parallel testing requires each subcomponent of the system, not just a component to support parallel mode. The most common data transfer buses such as PCI, USB, LAN, GPIB, etc. cannot support the true parallel data transfer mode because the components on the bus share the bandwidth. As the number of tasks increases, the available bandwidth allocated to each task is decreasing. Engineers can eliminate this bottleneck by selecting a data bus that supports dedicated bandwidth, such as PCI Express.

Although PCI Express has developed many applications for software processing on the host side, the latest high-speed digital electronic software may still need to reside in its own hardware for real-time response. FPGAs provide an optimized solution because they use software to define hardware capabilities and therefore respond at hardware speed. For example, LabVIEW can be used for on-board FPGA applications and synthesize the hardware needed directly from the graphical software.

Future embedded designs are moving toward higher efficiency, and many developers will use integrated system design platforms to achieve their design and testing. The graphical system design provides a commercially available off-the-shelf software and hardware platform that allows developers to design and test with the same intuitive software and validate designs, prototypes and test with a flexible hardware platform.